Anritsu 69177B Synthesized Signal Generator

The Anritsu 69177B Synthesized Signal Generator has a circuitry that consists of different subsystems that are contained on at least one printed circuit board (PCB) assemblies or in microwave segments situated on the RF deck. This circuit subsystem is comprised of the A17 CPU and A16 CPU Interface PCBs. The central processor unit (CPU) is the fundamental controller for the 69177B. This controller oversees all elements of the instrument. The CPU contains memory that stores the principle working framework segments and instrument firmware, instrument calibration information, and front board setups in the power-off condition. It has a GPIB interface that enables it to communicate with outer gadgets over the GPIB and a serial interface to a serial terminal port on the back board. The CPU is straightforwardly connected by means of a dedicated data and address bus to the A2 Front Panel PCB, the A9 PIN Control PCB, the A10 ALC PCB, the A11 FM PCB, the A12 Analog Instruction PCB, the A14 YIG, SDM, and SQM Driver.

The recurrence combination subsystem offers phase-lock control of the 69177B output recurrence. It consists of four phase-lock loops, the Reference Loop, the Coarse Loop, the Fine Loop, and the YIG Loop. The four phase-lock loops, working together, create a precisely incorporated, low-noise RF output signal, and is a general block graph of the recurrence synthesis subsystem.

If you are interested in this model and you want to learn more about its options, features, and specifications, you can check its manual, which is available on the ApexWaves.com website.